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 MIC2199
Micrel
MIC2199
300kHz 4mm x 4mm Synchronous Buck Converter
General Description
The MIC2199 is a high-power 300kHz synchronous buck DC-to-DC controller housed in a small 4mm x 4mm MLFTM 12-lead package. The MIC2199 operates from a wide 4.5V to 32V input and can be programmed for output voltages from 0.8V to 6V. The wide input voltage capability makes the MIC2199 an ideal solution for point-of-load DC-to-DC conversion in 5V, 12V, 24V, and 28V systems. The 300kHz switching frequency allows the use of a small inductor and small output capacitors. The current mode PWM control along with the external COMP pin allows for ease of stability compensation and fast transient response across a wide range of applications. An all N-Channel synchronous architecture and powerful output drivers allow up to 20A of output current capability. For smaller external components, refer to the 500kHz MIC2198. The MIC2199 is available in a 12-pin 4mm x 4mm MLFTM package with a junction temperature range from -40C to 125C.
Features
* * * * * * * * * * * 4.5V to 32V input range 4mm x 4mm MLFTM package 300kHz PWM operation 95% efficiency Output voltage adjustable down to 0.8V 20A output current capability Drives all N-Channel MOSFETs Logic controlled micropower shutdown Cycle-by-cycle current limiting Adjustable undervoltage lockout Frequency foldback overcurrent protection
Applications
* Point-of-load DC-to-DC conversion from 5V, 12V, 24V, 28V supplies * Telecom equipment * Wireless modems * Servers * Base stations
Typical Application
VIN 4.5V to 24V
U1
MIC2199BML
VDD BST
100.0
SD103BWS 4.7mF
22mF
VIN
EFFICIENCY (%)
0.1mF EN/UVLO HSD
IRF7821 2mH VOUT 0.01W 3.3V/7A
95.0
VSW LSD CSH 1nF COMP VOUT 10kW 2kW GND FB 6.04kW IRF7821 220mF
90.0 VOUT = 3.3V 85.0 0 2 4 ILOAD (A) 6 8
2.2nF
4.5V-24V to 3.3V/7A Converter
Efficiency for VIN = 5V and VOUT = 3.3V
MLF and MicroLeadFrame are trademarks of Amkor Technology, Inc. Micrel, Inc. * 2180 Fortune Drive * San Jose, CA 95131 * USA * tel + 1 (408) 944-0800 * fax + 1 (408) 474-1000 * http://www.micrel.com
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MIC2199
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Ordering Information
Part Number MIC2199BML Voltage Adj Temperature Range -40C to +125C Package 12-lead 4x4 MLFTM
Pin Configuration
COMP EN/UVLO FB CSH VOUT VIN
1 2 3 4 5 6
12 11 10 9 8 7
HSD VSW BST GND LSD VDD
4x4 MLF-12L (ML) x
Pin Description
Pin Number 1 2 Pin Name COMP EN/UVLO Pin Function Compensation (Output): Internal error amplifier output. Connect to capacitor or series RC network to compensate the regulator control loop. Enable/Undervoltage Lockout (Input): Low-level signal powers down the controller. Input below the 2.5V threshold disables switching and functions as an accurate undervoltage lockout (UVLO). Input below the threshold forces complete micropower (<0.1A) shutdown. Feedback (Input): Regulates FB pin to 0.8V. See "Applications Information" for resistor divider calculations. Current-Sense High (Input): Current limit comparator non-inverting input. A built-in offset of 100mV between CSH and VOUT pins in conjunction with the current-sense resistor set the current limit threshold level. This is also the non-inverting input to the current sense amplifier. Current-Sense Low (Input): Output voltage feedback input and inverting input for the current limit comparator and the current sense amplifier. Unregulated Input (Input): +4.5V to +32V supply input. 5V Internal Linear-Regulator (Output): VDD is the external MOSFET gate drive supply voltage and internal supply bus for the IC. Bypass to GND with 4.7F. Low-Side Drive (Output): High-current driver output for low-side N-Channel MOSFET. Voltage swing is between ground and VDD. Ground (Return). Boost (Input): Provides drive voltage for the high-side MOSFET driver. The drive voltage is higher than the input voltage by VDD minus a diode drop. Switch (Return): High-side MOSFET driver return. High-Side Drive (Output): High-current driver output for high-side MOSFET. This node voltage swing is between ground and VIN +5V minus a diode drop.
3 4
FB CSH
5 6 7
VOUT VIN VDD
8 9 10 11 12
LSD GND BST VSW HSD
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Absolute Maximum Ratings (Note 1)
Analog Supply Voltage (VIN) ....................................... +34V Digital Supply Voltage (VDD) ......................................... +7V Driver Supply Voltage (BST) .................................. VIN + 7V Sense Voltage (VOUT, CSH) ............................. 7V to -0.3V Enable Pin Voltage (VEN/UVLO) ...................................... VIN Power Dissipation (PD) 4x4 MLFTM ................................. 665mW @ TA = 85C Ambient Storage Temperature (TS) ......... -65C to +150C ESD, Note 3
Operating Ratings (Note 2)
Analog Supply Voltage (VIN) ........................ +4.5V to +32V Output Voltage Range (VOUT) ........................ +0.8V to +6V Junction Temperature (TJ) ....................... -40C to +125C Package Thermal Resistance 4x4 MLF-12L (JA) .............................................. 60C/W
Electrical Characteristics (Note 4)
VIN = VEN = 12V; TJ = 25C, unless noted, bold values indicate -40C TJ +125C Parameter Feedback Voltage Reference Feedback Voltage Reference Feedback Voltage Reference Feedback Bias Current Output Voltage Range Output Voltage Line Regulation Output Voltage Load Regulation Input and VDD Supply Quiescent Current Shutdown Quiescent Current Digital Supply Voltage (VDD) Undervoltage Lockout excluding external MOSFET gate drive current VEN/UVLO = 0V IL = 0mA to 5mA VIN upper threshold (turn-on threshold) VIN lower threshold (turn-off threshold) Enable/UVLO Enable Input Threshold UVLO Threshold Enable Input Current Current Limit Current Limit Threshold Voltage Error Amplifier Transconductance Error Amplifier GM Oscillator Section Oscillator Frequency Maximum Duty Cycle Minimum On-Time 270 80 300 85 170 200 330 kHz % ns 0.2 mS (VCSH - VOUT) 55 75 95 mV VEN/UVLO = 5V 0.6 2.2 1.1 2.5 0.1 1.6 2.8 5 V V A 3.95 4.7 1.6 0.1 5.0 4.25 4.1 2.5 5 5.3 4.4 mA A V V V VIN = 4.5V to 32V, VCSH - VOUT = 60mV 25mV < (VCSH - VOUT) < 60mV 0.8 0.03 0.5 Condition (1%) (2%) 4.5V < VIN < 32V, 0 < (VCSH - VOUT) < 60mV (3%) Min 0.792 0.784 0.776 10 6 Typ 0.8 Max 0.808 0.816 0.824 Units V V V nA V %/V %
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Parameter Frequency Foldback Threshold Foldback Frequency Gate Drivers Rise/Fall Time Output Driver Impedance CL = 3000pF source sink Driver Non-Overlap Time
Note 1. Note 2. Note 3. Note 4. Exceeding the absolute maximum rating may damage the device. The device is not guaranteed to function outside its operating rating. Devices are ESD protected; however, handling precautions are recommended. Human body model, 1.5k in series with 100pF. Specification for packaged product only.
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Condition measured at VOUT pin Min 0.25 Typ 0.40 75 Max 0.55 Units V kHz
60 5 3.5 80 8.5 6
ns ns
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Typical Characteristics
Quiescent Current vs. Temperature
4.0 QUIESCENT CURRENT (mA) 3.5 CURRENT (mA) 3.0 2.5 2.0 1.5 1.0 0.5 UVLO Shutdown PWM
Quiescent Current vs. Supply Voltage
4.0 3.5 3.0 2.5 2.0 1.5 UVLO 1.0 0.5 0 4 Shutdown 9 14 19 24 29 34 SUPPLY VOLTAGE (V)
REFERENCE VOLTAGE (V) 0.820
VFB Line Regulation
PWM
0.818 0.816 0.814 0.812 0.810 0.808 0 5 10 15 20 25 30 SUPPLY VOLTAGE (V) 35
0 -40 -20 0 20 40 60 80 100120140 TEMPERATURE (C)
VDD REGULATOR VOLTAGE (V)
VDD REGULATOR VOLTAGE (V)
0.82 0.818 0.816 FB VOLTAGE (V) 0.814 0.812 0.810 0.808 0.806 0.804 0.802
VFB vs. Temperature
6.0 5.0 4.0 3.0 2.0 1.0 0.0 0 4
VDD Line Regulation
5.02 5.01 5.00 4.99 4.98 4.97 4.96 4.95 4.94 0
VDD Load Regulation
0.8 -40 -20 0 20 40 60 80 100120140 TEMPERATURE (C)
8 12 16 20 24 28 32 SUPPLY VOLTAGE (V)
5 10 15 20 25 LOAD CURRENT (mA)
30
5.20 VDDREGULATOR VOLTAGE (V) 5.15 5.10 5.05 5.00 4.95 4.90 4.85
VDD vs. Temperature
FREQUENCY VARIATION (%)
Oscillator Frequency vs. Temperature
10 8 6 4 2 0 -2 -4 -6 -8 -10 -40 -20 0 20 40 60 80 100120140 TEMPERATURE (C) FREQUENCY VARIATION (%) 0.25 0.20 0.15 0.10 0.05 0.00 -0.05 -0.10 -0.15 0
Oscillator Frequency vs. Supply Voltage
4.80 -40 -20 0 20 40 60 80 100120140 TEMPERATURE (C)
5 10 15 20 25 30 SUPPLY VOLTAGE (V)
35
Overcurrent Threshold vs. Temperature
OVERCURRENT THRESHOLD (V) 88 84 82 80 78 76 74 72 70 -40 -20 0 20 40 60 80 100120140 TEMPERATURE (C) OUTPUT VOLTAGE (V) 86 3.5 3 2.5 2 1.5 1 0.5 0 0
Current Limit Foldback
VIN = 5V VOUT = 3.3V RCS = 20mV
1 2 3 4 OUTPUT CURRENT (A)
5
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Block Diagram
VIN
CIN EN/UVLO
2
VDD
VDD
7
Reference
VBG
0.8V
VIN VIN
6
4.7F D2
BST
10
Control Logic
HSD
12
Q2
CBST L1 RCS VOUT COUT
VSW
11
LSD
8
Q1
D1
PGND
9
Current Limit
PWM OUTPUT
Current Sense Amp
CSH
4
PWM
RESET CORRECTIVE RAMP
VOUT
VBG
AV = 2
5
Oscillator
COMP CCOMP RCOMP MIC2199
1
R1 Error Amp FB
3
100k
Gm = 0.2x10-3
VOUT = 0.8V 1 + R1 R2 VOUT(max) = 6.0V
R2
Figure 1. Internal Block Diagram
Functional Description
The MIC2199 is a BiCMOS, switched-mode, synchronous step-down (buck) converter controller. Current-mode control is used to achieve superior transient line and load regulation. An internal corrective ramp provides slope compensation for stable operation above a 50% duty cycle. The controller is optimized for high-efficiency, high-performance DC-DC converter applications. The MIC2199 block diagram is shown above. The MIC2199 controller is divided into 5 functions. * Control loop * Current limit * Reference, enable and UVLO * MOSFET gate drive * Oscillator
Control Loop The MIC2199 operates in PWM (pulse-width-modulation) mode. In PWM mode, the synchronous buck converter forces continuous current to flow in the inductor which also improves cross regulation of transformer coupled, multiple output configurations. PWM Control Loop The MIC2199 uses current-mode control to regulate the output voltage. This method senses the output voltage (outer loop) and the inductor current (inner loop). It uses inductor current and output voltage to determine the duty cycle of the buck converter. Sampling the inductor current removes the inductor from the control loop, which simplifies compensation. A block diagram of the MIC2199 PWM current-mode control loop is shown in Figure 2 and the PWM mode voltage and current waveform is shown in Figure 3. The inductor current is sensed by measuring the voltage across the resistor, RCS.
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A ramp is added to the amplified current-sense signal to provide slope compensation, which is required to prevent unstable operation at duty cycles greater than 50%. A transconductance amplifier is used for the error amplifier, which compares an attenuated sample of the output voltage with a reference voltage. The output of the error amplifier is
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the COMP (compensation) pin, which is compared to the current-sense waveform in the PWM block. When the current signal becomes greater than the error signal, the comparator turns off the high-side drive. The COMP pin (pin 1) provides access to the output of the error amplifier and allows the use of external components to stabilize the voltage loop.
VIN
CIN
VDD
VDD
7
Reference VIN
VBG
0.8V
VIN
6
4.7F D2
BST
10
CONTROL LOGIC AND PULSE-WIDTH MODULATOR
HSD
12
CBST Q2 L1 RCS VOUT COUT
VSW
11
LSD
8
D1 Q1
Q R S Current Sense Amp PGND
9
PWM COMPARATOR
CSH
4
VOUT
VBG
RESET CORRECTIVE RAMP
AV = 2
5
R1
Oscillator
COMP CCOMP RCOMP MIC2199
1
Error Amp
FB
3
R2 100k Gm = 0.2x10-3 VOUT = 0.8V R1 1 + R2
Figure 2. PWM Operation
VIN VSW 0V IL1 ILOAD 0A Reset Pulse VDD 0V VIN + VDD VHSD 0V VLSD VDD 0V
Figure 3. PWM-Mode Timing
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MIC2199
Current Limit The MIC2199 output current is detected by the voltage drop across the external current-sense resistor (RCS in Figure 2.). The current limit threshold is 75mV20mV. The currentsense resistor must be sized using the minimum current limit threshold. The external components must be designed to withstand the maximum current limit. The current-sense resistor value is calculated by the equation below:
R CS = 55mV IOUT(max)
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MOSFET Gate Drive The MIC2199 high-side drive circuit is designed to switch an N-Channel MOSFET. Referring to the block diagram in Figure 2, a bootstrap circuit, consisting of D2 and CBST, supplies energy to the high-side drive circuit. Capacitor CBST is charged while the low-side MOSFET is on and the voltage on the VSW pin (pin 11) is approximately 0V. When the highside MOSFET driver is turned on, energy from CBST is used to turn the MOSFET on. As the MOSFET turns on, the voltage on the VSW pin increases to approximately VIN. Diode D2 is reversed biased and CBST floats high while continuing to keep the high-side MOSFET on. When the low-side switch is turned back on, CBST is recharged through D2. The drive voltage is derived from the internal 5V VDD bias supply. The nominal low-side gate drive voltage is 5V and the nominal high-side gate drive voltage is approximately 4.5V due the voltage drop across D2. A fixed 80ns delay between the high- and low-side driver transitions is used to prevent current from simultaneously flowing unimpeded through both MOSFETs. Oscillator The internal oscillator is free running and requires no external components. The nominal oscillator frequency is 500kHz. If the output voltage is below approximately 0.4V, the oscillator operates in a frequency-foldback mode and the switching frequency is reduced to 75kHz.
The maximum output current is:
IOUT(max)= 95mV R CS
The current-sense pins CSH (pin 4) and VOUT (pin 5) are noise sensitive due to the low signal level and high input impedance. The PCB traces should be short and routed close to each other. A small (1nF to 0.1F) capacitor across the pins will attenuate high frequency switching noise. When the peak inductor current exceeds the current limit threshold, the current limit comparator, in Figure 2, turns off the high-side MOSFET for the remainder of the cycle. The output voltage drops as additional load current is pulled from the converter. When the output voltage reaches approximately 0.4V, the circuit enters frequency-foldback mode and the oscillator frequency will drop to 75kHz while maintaining the peak inductor current equal to the nominal 75mV across the external current-sense resistor. This limits the maximum output power delivered to the load under a short circuit condition. Reference, Enable and UVLO Circuits The output drivers are enabled when the following conditions are satisfied: * The VDD voltage (pin 7) is greater than its undervoltage threshold (typically 4.25V). * The voltage on the enable pin is greater than the enable UVLO threshold (typically 2.5V). The internal bias circuit generates a 0.8V bandgap reference voltage for the voltage error amplifier and a 5V VDD voltage for the gate drive circuit. The MIC2199 uses FB (pin 3) for output voltage sensing. The enable pin (pin 2) has two threshold levels, allowing the MIC2199 to shut down in a low current mode, or turn off output switching in UVLO mode. An enable pin voltage lower than the shutdown threshold turns off all the internal circuitry and reduces the input current to typically 0.1A. If the enable pin voltage is between the shutdown and UVLO thresholds, the internal bias, VDD, and reference voltages are turned on. The output drivers are inhibited from switching and remain in a low state. Raising the enable voltage above the UVLO threshold of 2.5V enables the output drivers. Either of two UVLO conditions will disable the MIC2199 from switching. * When the VDD drops below 4.1V * When the enable pin drops below the 2.5V threshold MIC2199 8
fS = 75kHz VOUT = 0.4V
fS = 300kHz
VSS
VIN = 7V VOUT = 3.3V
TIME
Figure 4. Startup Waveform Above 0.4V, the switching frequency increases to 500kHz causing the output voltage to rise a greater rate. The rise time of the output is dependent on the output capacitance, output voltage, and load current. The oscilloscope photo in Figure 4 show the output voltage at startup.
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Minimum Pulsewidth The MIC2199 has a specified minimum pulsewidth. This minimum pulsewidth places a lower limit on the minimum duty cycle of the buck converter. Figure 5 shows the minimum output voltage versus input supply voltage for the MIC2199. For example, for VIN = 15V, VOUT = 1V would be the lowest achievable voltage that conforms to the minimum-on-time.
2.5
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OUTPUT VOLTAGE (V)
2.0 1.5 1.0 0.5 0.0 4.5
9.5 14.5 19.5 24.5 INPUT VOLTAGE (V)
29.5
Figure 5. Minimum Output Voltage vs. Input Supply Voltage
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tor. Core loss information is usually available from the magnetics vendor. Copper loss in the inductor is calculated by the equation below:
Applications Information
Following applications information includes component selection and design guidelines. Inductor Selection Values for inductance, peak, and RMS currents are required to select the output inductor. The input and output voltages and the inductance value determine the peak-to-peak inductor ripple current. Generally, higher inductance values are used with higher input voltages. Larger peak-to-peak ripple currents will increase the power dissipation in the inductor and MOSFETs. Larger output ripple currents will also require more output capacitance to smooth out the larger ripple current. Smaller peak-to-peak ripple currents require a larger inductance value and therefore a larger and more expensive inductor. A good compromise between size, loss and cost is to set the inductor ripple current to be equal to 20% of the maximum output current. The inductance value is calculated by the equation below.
L= VOUT x (VIN(max) - VOUT ) VIN(max) x fS x 0.2 x IOUT(max)
PINDUCTORCu = IINDUCTOR(rms)2 x R WINDING
The resistance of the copper wire, RWINDING, increases with temperature. The value of the winding resistance used should be at the operating temperature.
R WINDING(hot) = R WINDING(20C) x 1 + 0.0042 x (THOT - T20C )
(
)
where: fS = switching frequency 0.2 = ratio of AC ripple current to DC output current VIN(max) = maximum input voltage The peak-to-peak inductor current (AC ripple current) is:
IPP = VOUT x (VIN(max) - VOUT ) VIN(max) x fS x L
where: THOT = temperature of the wire under operating load T20C = ambient temperature RWINDING(20C) is room temperature winding resistance (usually specified by the manufacturer) Current-Sense Resistor Selection Low inductance power resistors, such as metal film resistors should be used. Most resistor manufacturers make low inductance resistors with low temperature coefficients, designed specifically for current-sense applications. Both resistance and power dissipation must be calculated before the resistor is selected. The value of RSENSE is chosen based on the maximum output current and the maximum threshold level. The power dissipated is based on the maximum peak output current at the minimum overcurrent threshold limit.
R SENSE = 55mV IOUT(max)
The maximum overcurrent threshold is:
IOVERCURRENT(max) = 95mV R CS
The peak inductor current is equal to the average output current plus one half of the peak-to-peak inductor ripple current.
IPK = IOUT(max) + 0.5 x IPP
The maximum power dissipated in the sense resistor is:
The RMS inductor current is used to calculate the I2xR losses in the inductor. IP 1 3 IOUT(max)
2
PD(R
SENSE )
= IOVERCURRENT(max) x RCS
2
IINDUCTOR(rms) = IOUT(max) x 1 +
Maximizing efficiency requires the proper selection of core material and minimizing the winding resistance. The high frequency operation of the MIC2199 requires the use of ferrite materials for all but the most cost sensitive applications. Lower cost iron powder cores may be used but the increase in core loss will reduce the efficiency of the power supply. This is especially noticeable at low output power. The winding resistance decreases efficiency at the higher output current levels. The winding resistance must be minimized although this usually comes at the expense of a larger inductor. The power dissipated in the inductor is equal to the sum of the core and copper losses. At higher output loads, the core losses are usually insignificant and can be ignored. At lower output currents, the core losses can be a significant contribuMIC2199 10
MOSFET Selection External N-Channel logic-level power MOSFETs must be used for the high- and low-side switches. The MOSFET gateto-source drive voltage of the MIC2199 is regulated by an internal 5V VDD regulator. Logic-level MOSFETs, whose operation is specified at VGS = 4.5V must be used. It is important to note the on-resistance of a MOSFET increases with increasing temperature. A 75C rise in junction temperature will increase the channel resistance of the MOSFET by 50% to 75% of the resistance specified at 25C. This change in resistance must be accounted for when calculating MOSFET power dissipation. Total gate charge is the charge required to turn the MOSFET on and off under specified operating conditions (VDS and VGS). The gate charge is supplied by the MIC2199 gate drive circuit. At 500kHz switching frequency, the gate charge can be a significant source of power dissipation in the MIC2199. At low output load this power dissipation is noticeable as a November 2004
MIC2199
reduction in efficiency. The average current required to drive the high-side MOSFET is:
IG[high-side](avg) = QG x fS
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tT = CISS x VGS + COSS x VIN IG
where: IG[high-side](avg) = average high-side MOSFET gate current QG = total gate charge for the high-side MOSFET taken from manufacturer's data sheet with VGS = 5V. fs = 300kHz The low-side MOSFET is turned on and off at VDS = 0 because the freewheeling diode is conducting during this time. The switching losses for the low-side MOSFET is usually negligible. Also, the gate drive current for the low-side MOSFET is more accurately calculated using CISS at VDS = 0 instead of gate charge. For the low-side MOSFET:
IG[low-side](avg) = CISS x VGS x fS
where: CISS and COSS are measured at VDS = 0. IG = gate drive current (1A for the MIC2199) The total high-side MOSFET switching loss is:
PAC = (VIN +VD ) x IPK x t T x fS
where: tT = switching transition time (typically 20ns to 50ns) VD = freewheeling diode drop, typically 0.5V. fS it the switching frequency, nominally 300kHz The low-side MOSFET switching losses are negligible and can be ignored for these calculations. RMS Current and MOSFET Power Dissipation Calculation Under normal operation, the high-side MOSFETs RMS current is greatest when VIN is low (maximum duty cycle). The low-side MOSFETs RMS current is greatest when VIN is high (minimum duty cycle). However, the maximum stress the MOSFETs see occurs during short circuit conditions, where the output current is equal to IOVERCURRENT(max). (See the "Sense Resistor" section). The calculations below are for normal operation. To calculate the stress under short circuit conditions, substitute IOVERCURRENT(max) for IOUT(max). Use the formula below to calculate D under short circuit conditions. DSHORTCIRCUIT = 0.063 - 1.8 x 10 -3 x VIN The RMS value of the high-side switch current is:
ISW(high- side)(rms) = I 2 D x IOUT(max)2 + PP 12
Since the current from the gate drive comes from the input voltage, the power dissipated in the MIC2199 due to gate drive is: PGATEDRIVE = VIN IG[high-side](avg) + IG[low-side](avg)
(
)
A convenient figure of merit for switching MOSFETs is the onresistance times the total gate charge (RDS(on) x QG). Lower numbers translate into higher efficiency. Low gate-charge logic-level MOSFETs are a good choice for use with the MIC2199. Power dissipation in the MIC2199 package limits the maximum gate drive current. Parameters that are important to MOSFET switch selection are: * Voltage rating * On-resistance * Total gate charge The voltage rating of the MOSFETs are essentially equal to the input voltage. A safety factor of 20% should be added to the VDS(max) of the MOSFETs to account for voltage spikes due to circuit parasitics. The power dissipated in the switching transistor is the sum of the conduction losses during the on-time (PCONDUCTION) and the switching losses that occur during the period of time when the MOSFETs turn on and off (PAC).
ISW(low - side)(rms) =
(1- D) IOUT(max)2 +
IPP2 12
where: D = duty cycle of the converter D= VOUT x VIN
PSW = PCONDUCTION + PAC
where:
PCONDUCTION = ISW(rms)2 x RSW
PAC = PAC(off) + PAC(on) RSW = on-resistance of the MOSFET switch. Making the assumption the turn-on and turnoff transition times are equal, the transition time can be approximated by:
= efficiency of the converter. Converter efficiency depends on component parameters, which have not yet been selected. For design purposes, an efficiency of 90% can be used for VIN less than 10V and 85% can be used for VIN greater than 10V. The efficiency can be more accurately calculated once the design is complete. If the assumed efficiency is grossly inaccurate, a second iteration through the design procedure can be made.
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For the high-side switch, the maximum DC power dissipation is:
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Output Capacitor Selection The output capacitor values are usually determined by the capacitors ESR (equivalent series resistance). Voltage rating and RMS current capability are two other important factors in selecting the output capacitor. Recommended capacitors are tantalum, low-ESR aluminum electrolytics, and OS-CON. The output capacitor's ESR is usually the main cause of output ripple. The maximum value of ESR is calculated by: RESR VOUT IPP
PSWITCH1(dc) = RDS(on)1 x ISW1(rms)2
For the low-side switch (N-Channel MOSFET), the DC power dissipation is:
PSWITCH2(dc) = RDS(on)2 x ISW 2(rms)2
Since the AC switching losses for the low side MOSFET is near zero, the total power dissipation is:
Plow-side MOSFET(max) = PSWITCH2(dc)
The total power dissipation for the high side MOSFET is:
Phigh - sideMOSFET(max) = PSWITCH 1(dc) + PAC
External Schottky Diode An external freewheeling diode is used to keep the inductor current flow continuous while both MOSFETs are turned off. This dead time prevents current from flowing unimpeded through both MOSFETs and is typically 80ns The diode conducts twice during each switching cycle. Although the average current through this diode is small, the diode must be able to handle the peak current.
ID(avg) = IOUT x 2 x 80ns x fS
where: VOUT = peak-to-peak output voltage ripple IPP = peak-to-peak inductor ripple current The total output ripple is a combination of the ESR and the output capacitance. The total ripple is calculated below:
I x (1- D) 2 PP + IPP x RESR COUT x fS
2
VOUT =
(
)
The reverse voltage requirement of the diode is:
VDIODE(rrm) = VIN
The power dissipated by the Schottky diode is:
PDIODE = ID(avg) x VF
where: D = duty cycle COUT = output capacitance value fS = switching frequency The voltage rating of capacitor should be twice the output voltage for a tantalum and 20% greater for an aluminum electrolytic or OS-CON. The output capacitor RMS current is calculated below: IC = IPP 12
where: VF = forward voltage at the peak diode current The external Schottky diode, D2, is not necessary for circuit operation since the low-side MOSFET contains a parasitic body diode. The external diode will improve efficiency and decrease high frequency noise. If the MOSFET body diode is used, it must be rated to handle the peak and average current. The body diode has a relatively slow reverse recovery time and a relatively high forward voltage drop. The power lost in the diode is proportional to the forward voltage drop of the diode. As the high-side MOSFET starts to turn on, the body diode becomes a short circuit for the reverse recovery period, dissipating additional power. The diode recovery and the circuit inductance will cause ringing during the high-side MOSFET turn-on. An external Schottky diode conducts at a lower forward voltage preventing the body diode in the MOSFET from turning on. The lower forward voltage drop dissipates less power than the body diode. The lack of a reverse recovery mechanism in a Schottky diode causes less ringing and less power loss. Depending on the circuit components and operating conditions, an external Schottky diode will give a 1/2% to 1% improvement in efficiency.
OUT(rms)
The power dissipated in the output capacitor is:
PDISS(C
OUT )
= IC
OUT(rms)2
x RESR(C
OUT )
Input Capacitor Selection The input capacitor should be selected for ripple current rating and voltage rating. Tantalum input capacitors may fail when subjected to high inrush currents, caused by turning the input supply on. Tantalum input capacitor voltage rating should be at least 2 times the maximum input voltage to maximize reliability. Aluminum electrolytic, OS-CON, and multilayer polymer film capacitors can handle the higher inrush currents without voltage derating. The input voltage ripple will primarily depend on the input capacitors ESR. The peak input current is equal to the peak inductor current, so:
VIN = IINDUCTOR(peak) x RESR(C ) IN
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The input capacitor must be rated for the input current ripple. The RMS value of input capacitor current is determined at the maximum output current. Assuming the peak-to-peak inductor ripple current is low:
IC (rms) IOUT(max) x IN D x (1- D)
Micrel
* Supply current to the MIC2199 * MOSFET gate-charge power (included in the IC supply current) * Core losses in the output inductor To maximize efficiency at light loads: * Use a low gate-charge MOSFET or use the smallest MOSFET, which is still adequate for maximum output current. * Use a ferrite material for the inductor core, which has less core loss than an MPP or iron power core. Under heavy output loads the significant contributors to power loss are (in approximate order of magnitude): * Resistive on-time losses in the MOSFETs * Switching transition losses in the MOSFETs * Inductor resistive losses * Current-sense resistor losses * Input capacitor resistive losses (due to the capacitors ESR) To minimize power loss under heavy loads: * Use logic-level, low on-resistance MOSFETs. Multiplying the gate charge by the on-resistance gives a figure of merit, providing a good balance between low and high load efficiency. * Slow transition times and oscillations on the voltage and current waveforms dissipate more power during turn-on and turnoff of the MOSFETs. A clean layout will minimize parasitic inductance and capacitance in the gate drive and high current paths. This will allow the fastest transition times and waveforms without oscillations. Low gatecharge MOSFETs will transition faster than those with higher gate-charge requirements. * For the same size inductor, a lower value will have fewer turns and therefore, lower winding resistance. However, using too small of a value will require more output capacitors to filter the output ripple, which will force a smaller bandwidth, slower transient response and possible instability under certain conditions. * Lowering the current-sense resistor value will decrease the power dissipated in the resistor. However, it will also increase the overcurrent limit and will require larger MOSFETs and inductor components. * Use low-ESR input capacitors to minimize the power dissipated in the capacitors ESR.
The power dissipated in the input capacitor is: PDISS(C
IN )
= IC
IN (rms)
2
x RESR(C
IN )
Voltage Setting Components The MIC2199 requires two resistors to set the output voltage as shown in Figure 6.
R1 Error Amp FB
3
R2
VREF 0.8V MIC2199
Figure 6. Voltage-Divider Configuration The output voltage is determined by the equation: R1 VO = VREF x 1 + R2 Where: VREF for the MIC2199 is typically 0.8V. A typical value of R1 can be between 3k and 10k. If R1 is too large it may allow noise to be introduced into the voltage feedback loop. If R1 is too small in value it will decrease the efficiency of the power supply, especially at low output loads. Once R1 is selected, R2 can be calculated using: R2 = VREF x R1 VO - VREF
Voltage Divider Power Dissipation The reference voltage and R2 set the current through the voltage divider.
IDIVIDER = VREF R2
The power dissipated by the divider resistors is:
PDIVIDER = (R1+ R2) x IDIVIDER
2
Efficiency Calculation and Considerations Efficiency is the ratio of output power to input power. The difference is dissipated as heat in the buck converter. Under light output load, the significant contributors are:
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MIC2199
MIC2199
Decoupling Capacitor Selection The 4.7F decoupling capacitor is used to minimize noise on the VDD pin. The placement of this capacitor is critical to the proper operation of the IC. It must be placed right next to the pins and routed with a wide trace. The capacitor should be a good quality tantalum. An additional 1F ceramic capacitor may be necessary when driving large MOSFETs with high gate capacitance. Incorrect placement of the VDD decoupling capacitor will cause jitter or oscillations in the switching waveform and large variations in the overcurrent limit. A 0.1F ceramic capacitor is required to decouple the VIN. The capacitor should be placed near the IC and connected directly to between pin 6 (VIN) and pin 9 (GND). PCB Layout and Checklist PCB layout is critical to achieve reliable, stable and efficient performance. A ground plane is required to control EMI and minimize the inductance in power, signal and return paths. The following guidelines should be followed to insure proper operation of the circuit. * Signal and power grounds should be kept separate and connected at only one location. Large currents or high di/dt signals that occur when the MOSFETs turn on and off must be kept away from the small signal connections. * The connection between the current-sense resistor and the MIC2199 current-sense inputs (pin 4 and 5) should have separate traces, through a 10 resistor on each pin. The traces should be routed as closely as possible to each other and their length should be minimized. Avoid running the traces under the inductor and other switching components. The 10 resistor should be placed close as possible to pins 4 and 5 on the MIC2199 and a 1nF to 0.1F capacitor placed between pins 4 and 5 will help attenuate switching noise on the current sense traces. This capacitor should be placed close to pins 4 and 5.
Micrel
* When the high-side MOSFET is switched on, the critical flow of current is from the input capacitor through the MOSFET, inductor, sense resistor, output capacitor, and back to the input capacitor. These paths must be made with short, wide pieces of trace. It is good practice to locate the ground terminals of the input and output capacitors close to each. * When the low-side MOSFET is switched on, current flows through the inductor, sense resistor, output capacitor, and MOSFET. The source of the low-side MOSFET should be located close to the output capacitor. * The freewheeling diode, D1 in Figure 2, conducts current during the dead time, when both MOSFETs are off. The anode of the diode should be located close to the output capacitor ground terminal and the cathode should be located close to the input side of the inductor. * The 4.7F capacitor, which connects to the VDD terminal (pin 7) must be located right at the IC. The VDD terminal is very noise sensitive and placement of this capacitor is very critical. Connections must be made with wide trace. The capacitor may be located on the bottom layer of the board and connected to the IC with multiple vias. * The VIN bypass capacitor should be located close to the IC and connected between pins 6 and 9. Connections should be made with a ground and power plane or with short, wide trace.
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MIC2199
Micrel
Package Information
4x4 12-Lead MLFTM (ML) x
MICREL, INC.
TEL
2180 FORTUNE DRIVE SAN JOSE, CA 95131
FAX
USA
+ 1 (408) 944-0800
+ 1 (408) 474-1000
WEB
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2004 Micrel, Incorporated.
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MIC2199


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